부품 정보
Semiconductor, y2kc nonvolatile timekeeping ram
TXT
묘사:
Digital Microcircuit
MRC:
The minimum and maximum limits of temperature at which the item is rated for operation.AFGA
Operating Tempurature Range:
+00.1 to 70.0 degrees celsius
MRC:
The basic purpose and number of functions of the device,modified by its intended use.CSSL
Design Function And Quantity:
1 oscillator, clock
MRC:
Those unusual or unique characteristics or qualities of an item not covered in the other requirements and which are determined to be essential for identification.FEAT
Special Features:
Integrated nv sram, realtime clock, crystal power-fail contro circuit and circuit and lithium energy source; clock registers are accessed identical to the static ram; these registers are resident in the eight top ram locations; century byte register; totally nonvolite with over 10 years of operation in the absence of power; bcd coded century, year, month, date, day hours, compensationvalid up to the year 2100; battery voltage level indicator flag; power-fail write protection allows for plus/minus10% vcc power supply tolerance; lithium energy source is electrically disconnected to retain freshness until power is applied for the first time.
MRC:
Test conditions and ratings,or environmental and performance requirements that are different,more critical,or more specific than those specified in a governing test data document.SPCL
Special Test Features:
The ds1743 is a full function, year 2000-complaint (y2kc), real-time clock/calendar (rtc) and 8k x 8 non-volatile static ram. The real time clock (rtc) information and control bits reside in the eight uppermost ram locations. Corrictions for the month and leap year are made automatically. Clock register are double buffered system also prevents time loss as the timekeeping countdown continues unabated by access to time register data. The ds1743 also contains its own power-fial circuitry, which deselects the device when the vcc supply is in an out of tolerance condition. This featur prevents loss of data from unpredictable system operation brought on by low vcc as errant access and update cycles are avoided.
